1. Field of the Invention
The present invention relates to magnetic head driving circuits for driving a magnetic head for recording data on a recording medium, and more particularly, to a magnetic head driving circuit capable of over-writing data on a so-called magneto-optical disc.
2. Description of the Background Art
In recent years, a magnetic field modulating system magneto-optical disc apparatus has been proposed. In such a magneto-optical disc apparatus, data is written through irradiation of a recording portion of a magneto-optical disc with a laser beam of a fixed amount and application of magnetic field to the irradiated portion.
FIG. 4 is a block diagram explaining the principle of such magneto-optical disc apparatus. The magneto-optical disc apparatus shown in FIG. 4 comprises a magneto-optical disc 50 having a vertical magnetization film 51, a lens 52 for picking up a laser beam, a magnetic head 53 and a magnetic head driving circuit 54.
Operation for over-writing the magneto-optical disc 50 will be described. The lens 52 narrows down a laser beam and directs the same to the vertical magnetization film 51 of the magneto-optical disc 50. The irradiation of the laser beam causes the temperature of the vertical magnetization film 51 to exceed a Curie point. The magnetic head driving circuit 54 generates a drive current I in response to input data and supplies the current I to the magnetic head 53. The magnetic head 53 generates a magnetic field H in response to the supplied current I. Thus, the generated magnetic field is applied to the portion whose temperature exceeds the Curie point. As a result, a magnetic pattern corresponding to the input data is recorded on the magneto-optical disc 50.
In order to record data on a magneto-optical disc, however, the current technique requires a magnetic field to be generated which is stronger than that required for an ordinary magnetic disc. It is therefore necessary to bring a large current to a high level or down to a low level at a high speed.
A magnetic head circuit for resolving such problem is disclosed in Japanese Patent Laying-Open No. 63-94406.
FIG. 5 is a circuit diagram showing the magnetic head driving circuit described in Japanese Patent Laying-Open No. 63-94406. With reference to FIG. 5, the magnetic head driving circuit comprises a magnetic head coil 1 having an impedance Lx, auxiliary coils 2 and 4, direct current power sources 3 and 5, switching devices 6 and 7, and a data modulator 8 for modulating input data (recording data) on a predetermined system to generate complementary recording signals S1, S1. The auxiliary coil 2 is connected between a node P which is one end of the magnetic head coil 1, and the direct current power source 3. The auxiliary coil 4 is connected between a node Q which is the other end of the magnetic head coil 1, and the direct current power source 5. Each of the auxiliary coils 2 and 4 have an impedance Ld (Ld&gt;&gt;Lx) larger than the impedance Lx of the magnetic head coil 1.
The switching device 6 is connected between the node P and a ground terminal GND and is turned on/off in response to the recording signal S1. The switching device 7 is connected between the node Q and the ground terminal GND and is turned on/off in response to the recording signal S1.
FIG. 6 is a diagram showing operation of the magnetic head driving circuit shown in FIG. 5. With reference to FIG. 6, (a) is a waveform diagram of the recording signal S1, (b) a waveform diagram of the recording signal S1, (c) a waveform diagram of the charging current I.sub.1 flowing through the auxiliary coil 2, (d) a waveform diagram of the charging current I.sub.2 flowing through the auxiliary coil 4, (e) a waveform diagram of the drive current Ix flowing through the magnetic head coil 1, (f) shows a load impedance of the auxiliary coil 4 and (g) shows a load impedance of the auxiliary coil 2.
With reference to FIGS. 5 and 6, operation of the magnetic head driving circuit shown in FIG. 5 will be described.
First, the data modulator 8 modulates recording data to generate two recording signals S1 and S1 complementary to each other. The recording signal S1 is applied to the switching device 6, while the recording signal SI is applied to the switching device 7. When the switching device 6 is turned on in response to the recording signal S1 (logical high level) and the switching device 7 is turned off in response to the recording signal S1 (logical low level), the circuit shown by the solid line in FIG. 5 is established wherein the charging current I.sub.l for charging the auxiliary coil 2 flows from the direct current power source 3 to the ground terminal GND through the auxiliary coil 2 and the switching device 6. At this time, the charging current I.sub.2 for charging the auxiliary coil 4 flows from the direct current power source 5 to the ground terminal GND through the auxiliary coil 4, the magnetic head coil 1 and the switching-device 6. Thus, the magnetic head coil 1 is supplied with the drive current I.sub.X from the node Q toward the node P.
On the other hand, when the signals S1 and S1 are inverted to turn on the switching device 7 and turn off the switching device 6 as indicated by dotted lines in FIG. 5 (see FIGS. 6 (a) and (b)), the charging current I.sub.2 for charging the auxiliary coil 4 flows from the direct current power source 5 to the ground terminal GND through the auxiliary coil 4 and the switching device 7. At this time, the charging current I.sub.1 for charging the auxiliary coil 2 flows from the direct current power source 3 to the ground terminal GND through the auxiliary coil 2, the magnetic head coil 1 and the switching device 7. The drive current I.sub.X therefore flows to the magnetic head coil 1 from the node P toward the node Q.
In response to on/off of the switching devices 6 and 7, the load of the auxiliary coil 2 (see FIG. 6 (g)) and the load of the auxiliary coil 4 (see FIG. 6 (f)) attain the impedance Lx of the magnetic head coil or 0.
The relationship between said charging currents I.sub.1 and I.sub.2 is described in the above-mentioned Japanese Patent Laying-Open No. 63-94406, wherein the inductance of the auxiliary coils 2 and 4 is denoted by La and the inductance of the magnetic head coil 1 by Ln to establish the following equation. ##EQU1##
Since the relationship of the impedances is expressed as Ld&gt;&gt;Lx, the relationship of La&gt;&gt;Ln is also established, resulting in I.sub.2 .apprxeq.I.sub.1. As is seen from the above equation, the relationship between I.sub.1 and I.sub.2 includes no factor of time. As a result, it is possible to increase an inversion rate of a drive current Ix by setting the impedances of the auxiliary coils 2 and 4 to be larger than that of the magnetic head coil 1. In addition, with Ld&gt;&gt;Lx, Lx is substantially 0, comparatively so that load fluctuation of the auxiliary coils 2 and 4 is negligible.
However, to increase the frequencies of the recording signals S1 and S1 in order to increase the data recording rate, the above-mentioned impedance Ld should be as small as possible. As the impedance Ld is decreased, Ld is no longer negligible with respect to Lx. In other words, load fluctuation occurs.
This is followed by imbalance between the charging currents I.sub.1 and I.sub.2 of the respective auxiliary coils 2 and 4, causing difference as shown in FIGS. 6 (c) and (d). Zero-cross points of the drive current I.sub.x therefore shift and the drive current I.sub.X of the magnetic head coil 1 have different values at a positive level and a negative level, so that jitter of the recording mark is increased to deteriorate the reliability of reproduced data.
The above-described problem becomes particularly conspicuous in the following case. That is, it is a case where a generally known and employed NRZI recording system (Non-return to Zero Inverse) of 2-7 RLL code (2-7 Run Length Limited) is used as a modulation system for recording/reproduction in a magneto-optical disc apparatus. While such system has an advantage of increasing a recording density, it also has a disadvantage that a recording signal in which recording bits are modulated includes a large amount of direct current components. It is therefore impossible to avoid the above-described problem when a recording signal of the above-described system is input to a conventional magnetic head driving circuit.
FIG. 7 shows a bit arrangement of recording data based on the above-described 2-7 RLL code. The 2-7 RLL code includes two to seven "0" between "1" and "1". Modulation of the code by a data modulator of the NRZI system generates recording signals S1 and S1 including a large amount of direct current components as shown in FIGS. 6 (a) and (b).
FIG. 8 is a circuit diagram of another magnetic head driving circuit disclosed in above-mentioned Japanese Patent Laying-Open No. 63-94406. With reference to FIG. 8, the magnetic head driving circuit comprises a magnetic head coil 15, switching devices 11, 12, 13 and 14, a direct current power source 17 and an auxiliary coil 18. The relationship of the impedances between the auxiliary coil 18 and the magnetic head coil 15 is the same as that of the case shown in FIG. 5. The switching devices 11 and 14 both turn on/off in response to the recording signal S1. The switching devices 12 and 13 both turn on/off in response to the recording signal S1. The NPN transistor shown in FIG. 9 is used for the switching devices 11-14. Nodes C11 and E11 of FIG. 8 represent a collector and an emitter of the switching device 11 and nodes C13 and E13 represent a collector and an emitter of the switching device 13. The NPN transistor can be replaced by the PNP transistor shown in FIGS. 10 or various devices such as FET (not shown).
FIG. 11 is a diagram illustrating the operation of the magnetic head driving circuit shown in FIG. 8. With reference to FIG. 11, (a) and (b) show waveform diagrams of the signals S1 and S1. (c), (d), (e) and (f) are waveform diagrams of the voltages of the collector C13, the emitter E13, the collector C11 and the emitter E11, respectively. FIG. 11(g) shows a load impedance of the auxiliary coil 18. The broken lines of (d) and (f) show base voltages of the switching devices 13 and 11.
With reference to FIGS. 8 and 11, operation of the magnetic head driving circuit shown in FIG. 8 will be described. First, recording data is modulated to generate signals S1 and S1. The switching devices 12 and 13 turn on in response to the signal S1 (high level), while the switching devices 11 and 14 turn off in response to the signal S1 (low level). Conversely, when the signal S1 is at a low level and the signal S1 is at a high level, the switching devices 12 and 13 turn off, while the switching devices 11 and 14 turn on.
That is, when the switching devices 12 and 13 turn on (see FIG. 11 (a)) and the switching devices 14 and 11 turn off (see FIG. 11 (b)), for example, as shown in FIG. 8, the charging current of the auxiliary coil 18 flows from the direct current power source 17 to the ground terminal GND through the auxiliary coil 18, the switching device 13, the magnetic head coil 15 and the switching device 12. As a result, the drive current I.sub.X is supplied to the magnetic head coil 15 from the node Q toward the node P.
Conversely, when the switching devices 14 and 11 turn on and the switching devices 12 and 13 turn off, the charging current of the auxiliary coil 18 flows from the direct current power source 17 to the ground terminal GND through the auxiliary coil 18, the switching device 11, the magnetic head coil 15 and the switching device 14. As a result, the drive current I.sub.X is supplied to the magnetic head coil 15 from the node P toward the node Q.
In this related art, the load of the auxiliary coil 18 is fixed (equal to the impedance Lx of the magnetic head coil 15) as shown in FIG. 11 (g), in response to on/off of the switching devices 12 and 13 and the switching devices 14 and 11. The problem of load fluctuation in the magnetic head driving circuit of FIG. 5 is therefore resolved.
In the magnetic head driving circuit in FIG. 8, however, the voltage waveforms of the collectors C.sub.13 and C.sub.11 and those of the emitters E.sub.13 and E.sub.11 have a large spike-shape because of the current flowing through the auxiliary coil 18 and the magnetic head coil 15 immediately after on or off of the switching devices 12 and 13 and the switching devices 14 and 11.
Since the voltage of the emitter E.sub.13 and the voltage of the emitter E.sub.11 become higher than the base voltages (indicated by X in FIG. 11) because of the spike-shaped waveform, the switching device 13 remains off (not shifted to an on state) immediately after the base voltage is inverted from a low level to a high level, and conversely, the switching device 11 remains on (not shifted to an off state) immediately after the base voltage is inverted from a high level to a low level (Y in FIG. 11).
The drive current I.sub.X of the magnetic head is therefore slow to rise and fall. This is because of the circuit structure wherein the switching devices 13 and 11 are placed between the auxiliary coil 18 and the magnetic head 15.
The use of the PNP transistor shown in FIG. 10 as the switching devices 12 and 13 and the switching devices 14 and 11 of FIG. 8 changes the waveforms of FIG. 11 to those shown in FIG. 12. With reference to FIG. 12, C.sub.13 and C.sub.11 are voltage waveforms of the collectors of the switching devices 13 and 11, respectively, and E.sub.13 and E.sub.11 are voltage waveforms of the emitters of the switching devices 13 and 11, respectively. B.sub.13 ' and B.sub.11 ' are voltage waveforms of the bases of the switching devices 13 and 11, respectively.
Description will now be made of generation of spike noise and delay in switching response in a case where a PNP transistor is used as a switching device.
Similarly to the case of the NPN transistor, the voltage waveforms of the collectors C.sub.13 and C.sub.11 and those of the emitters E.sub.13 and E.sub.11 have a large spike-shape because of the current flowing through the auxiliary coil 18 and the magnetic head coil 15 immediately after on or off of the switching devices 12 and 13 and the switching devices 14 and 11.
Since the voltage of the collector C.sub.13 (see FIG. 12 (c)) and the voltage of the emitter C.sub.11 (see FIG. 12 (e)) become higher than the base voltages because of the spike-shaped waveform, the switching device 11 remains on (not shifted to an off state) immediately after the base voltage B.sub.13 ' attains a high level (see Z in FIG. 12).
Therefore, the drive current I.sub.X of the magnetic head is slow to rise and fall. This is also because of the circuit structure wherein the switching devices 13 and 11 are located between the auxiliary coil 18 and the magnetic head coil 15. Although the description is made of NPN or PNP transistor by way of example of the switching devices 12 and 13 and the switching devices 14 and 11, it is obvious that the same problem occurs even if a switching element of FET or the like is used.
A magnetic head circuit having improved rise and fall characteristics of a drive current to be applied to a magnetic head coil is disclosed in Japanese Patent Laying-Open No. 63-244402.
FIG. 13 is a schematic circuit diagram of the magnetic head driving circuit disclosed in said Patent Laying-Open No. 63-244402. The magnetic head driving circuit shown in FIG. 13 differs from that of FIG. 8 in that a timing generator 19 is provided for generating signals S2, S3, S4 and S5 for-controlling on/off timing of the switching devices 11-14 in response to the recording signal S1. The signal S2 is applied to the switching device 12, the signal S3 to the switching device 11, the signal S4 to the switching device 14 and the signal S5 to the switching device 13.
FIG. 14 is an output waveform diagram of each circuit of the magnetic head driving circuit shown in FIG. 13. With reference to FIG. 14, (a) shows a waveform diagram of the recording signal S1, (b) shows that of the signal S2, (c) shows that of the signal S3, (d) shows that of the signal S4, (e) shows that of the signal S5 and (f) shows a waveform of the drive current I.sub.X.
Operation of the magnetic head driving circuit shown in FIG. 13 will be described.
When the direction of the drive current Ix is changed to flow from the node Q toward the node P, the signal S5 rises prior to falling of the signals S3 and S4. A time difference between the falling of the signals 3 and 4 and the rising of the signal S5 is represented as .DELTA.t.sub.1.
The switching device 11 and the switching device 14 change from on to off in response to the change of the signal S3 from a high level to a low level and the change of the signal S4 from a high level to a low level, respectively. The switching device 13 is turned on in response to the signal S5 which has risen earlier by a predetermined time .DELTA.t.sub.1 than the falling of said signals S3 and S4.
Conversely, when the drive current Ix is changed to flow from the node P toward the node Q, the signal S3 is brought to high prior to falling of the signals S2 and S5. A time difference between the falling of the signals S2 and S5 and the rising of the signal S3 is represented as .DELTA.t.sub.2. The switching device 11 therefore turns on before the switching devices 13 and 12 turn off.
As a result, a sufficient charging current is supplied to the auxiliary coil. When the switching device is switched, a charge generated by counter electromotive force of the coil causes the drive current to be applied to the magnetic head coil 15 to suddenly rise and fall.
However, increasing the frequency of the recording signal S1 (increasing a data transmission rate) requires the above-described .DELTA.t1 and .DELTA.t2 to be considerably small. As a result, the auxiliary coil cannot be fully charged, so that a time required for the drive current for the magnetic head coil to rise and fall cannot be reduced.
The foregoing problems of the related art are summarized in the following (1) to (3).
(1) Values of a current to be applied to the magnetic head coil lose balance between positive and negative. In other words, a gap is generated between a value of the current to be applied to the coil in one direction and that of the current to be applied to the same in the opposite direction. As a result, jitter of the recording mark is increased.
(2) Even if the level of the recording signal (base voltage) is switched, the switch remains off immediately after that, whereby the drive current to be applied to the coil is caused to rise and fall slowly.
(3) Increase of a rate for recording data is followed by a reduction of charging time, resulting in insufficient charging of the auxiliary coil. It is therefore impossible to cause the drive current to be applied to the coil to suddenly rise and fall.
Thus, it is difficult for any of the above described conventional systems to record data of such as 2-7RLL code at a high speed.